Development of a FPGA-based GPS/INS integrated system

The integration of GPS and INS can overcome the defects of INS or GPS standalone systems, and benefits from the complementary characteristics of the two systems. GPS/INS integration is most often implemented on a PC or application-specific integrated circuit (ASIC) platform. The SNAPlib is developing a far more flexible platform based on field programmable gate array (FPGA) technology. Compared with the ASIC approach, the FPGA approach can shorten the research and development period. Its reprogrammable hardware configuration represents a system design methodology of lower risk. It also allows maximum flexibility, being able to integrate a wide range of GPS and INS sensor packages.

The research is conducted under the Australian Cooperative Research Centre for Spatial Information (CRC-SI) project 1.3 “Integrated Positioning and Geo-referencing Platform”. This project aims to develop a generic hardware/software platform for positioning and imaging sensor integration. The current work focuses on development of software and algorithms, and a FPGA-based GPS/INS data logging device. The system development can be divided into three phases:

(1) Software development for tight and loose integration.

(2) Data logging device development.

(3) Real-time integrated system on an FPGA platform.

A FPGA-based data logging device has been implemented. The system records the GPS and INS data onto a compact flash card. The data can then be subsequently processed by the tight/loose integration software for estimation of the INS errors. The Main features of the data logging device include,

• two RS232 ports for GPS and IMU I/O;
• one BNC socket for PPS input;
• 5.12 ms time-synchronisation resolution;
• LCD for operation status display;
• four buttons for operating the device;
• Compact flash (CF) card for data storage.

Time synchronisation logic design is realised on an Altera FPGA development board and comprises a ‘NiosII’ soft-core processor and custom logic for the time-synchronisation and FIFO UART functions. The eCos real-time operating system runs on the Nios processor along with software for the user interface and data logging functions. A free-running counter is latched on arrival of the PPS and serial data start bit, this count is then used for time-synchronising the data streams. Figure below provides an overview of the hardware organisation.

The data recorded by the data logging device is further processed by the software. The key components of the software include: (1) decoding the GPS and INS binary streams; (2) time synchronisation; (3) SDINS; (4) integration Kalman filtering, and (5) graphical user interface (GUI). The block diagram of the software is illustrated in Figure below. The software is running on MS Windows and will be migrated onto the FPGA platform to implement a real-time integrated system. Main features:

• accept 1Hz GPS data and 10Hz IMU data;
• embedded Strapdown INS;
• feedback correction of INS solution using the integration Kalman filter estimates;
• interpolate the IMU data to ensure no data lost;
• continuous 10Hz PVAT output; and

§ user-friendly GUI interface

Many tests have been carried out. The results demonstrate that the data logging device can provide a timing resolution of 5.12ms for time synchronisation. The system (hardware and software components) performed stably in the tests. The difference in position solutions derived from GPS/INS integration and GPS-only (of accuracy within 0.5m with OMNISTAR Wide Area Differential Service) agree to within 2mm. Testing reveals the GPS/INS velocity solution has a standard deviation (in all three directions) of less than 0.04m/s.

Further analysis of the test data for evaluating the key specifications of the system is on-going. Planned future developments include migration of the design to the FPGA platform for real-time implementation.

Some related publications:

1. Y. Li, P. Mumford, J. Wang, and C. Rizos, Development of a GPS/INS Integrated System on the Field Programmable Gate Array Platform, Proceedings of ION GNSS 2006, Forth Worth, Texas, September 26-30, 2006.
2. P. Mumford, Y. Li, J. Wang, C. Rizos, and W. Ding (2006) A Time-synchronisation Device for Tightly Coupled GPS/INS Integration, Proceedings of IGNSS 2006 , Holiday Inn Surfers Paradise, Australia, 17 – 21 July 2006.
3. Y. Li, P. Mumford, J. Wang, C. Rizos, and W. Ding (2006) Time Synchronisation Analysis of an FPGA based GPS/INS Integrated System, Proceedings of IGNSS 2006, Holiday Inn Surfers Paradise, Australia, 17 – 21 July 2006.